1. General Description
SE0352N01 is an Active Matrix Electrophoretic Display(AM EPD), with interface and a reference system design. The
display is capable to display images at 1-bit white and black full display capabilities. The 3.52” active area contains
240x360 pixels. The module is a TFT-array driving electrophoretic display, with integrated circuits including gate
buffer, source buffer, MCU interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM. Module can be
used in portable electronic devices, such as Electronic Shelf Label (ESL) System.
2. Features
240×360 pixels display
White reflectance above 30%
Contrast ratio above 8:1
Ultra wide viewing angle
Ultra low power consumption
Pure reflective mode
Bi-stable display
Commercial temperature range
Landscape, portrait modes
Hard-coat antiglare display surface
Ultra Low current deep sleep mode
On chip display RAM
Waveform can stored in On-chip OTP or written by MCU
Serial peripheral interface available
On-chip oscillator
On-chip booster and regulator control for generating VCOM, Gate and Source driving voltage
Built-in temperature sensor
3. Application
Electronic Shelf Label System
| No. | Name | I/0 | Description | Remark |
| 1 | NC | | Do not connect with other NC pins | |
| 2 | GDR | 0 | N-Channel MOSFETGate Drive Control | |
| 3 | RESE | I | Current Sense Input for the Control Loop | |
| 4 | NC | | Do not connect with other NC pins | |
| 5 | VDHR | C | Positive source driver voltage for Source | |
| 6 | TSCL | 0 | IC Interface to digital temperature sensor Clock pin | |
| 7 | TSDA | I/0 | F²C Interface to digital temperature sensor Data pin | |
| 8 | BS | I | Bus Interface selection pin | Note 5-4 |
| 9 | BUSY N | 0 | Busy state output pin | Note 5-3 |
| 10 | RST N | I | Reset signal input.Active Low. | |
| 11 | DC | I | Data /Command control pin | Note 5-2 |
| 12 | CSB | I | Chip select input pin | Note 5-1 |
| 13 | SCL | I | Serial Clock pin (SPI) | |
| 14 | SDA | I | Serial Data pin(SPD | |
| 15 | VDDIO | P | Power Supply for interface logic pins.It should be connected with VDD | |
| 16 | VDD | P | Power Supply for the chip | |
| 17 | GND | P | Ground | |
| 18 | VDDD | C | Core logic power pin
VDD can be regulatedintermally from VCI.A capacitor should be
connected between VDD and VSS under all circumstances | |
| 19 | VPP | P | Power Supply for OTP Programming | |
| 20 | VSH | C | Positive Source driving voltage | |
| 21 | VGH | C | Positive Gate driving voltage | |
| 22 | VSL | C | Negative Source driving voltage | |
| 23 | VGL | C | Negative Gate driving voltage | |
| 24 | VCOM | C | VCOM driving voltage | |
Product Tags:
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E Ink Display Electronic Label Paper 3.52 Inch Flexible AM EPD Images
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